Post-Silicon Validation Engineer for AI Chips

Graphcore; West of England; On-site; GBP 70,000 - 90,000; Full time

Benefits offered by this job

Flexible working

Private medical insurance

Generous annual leave policy

Employee assistance programme

Job summary

A leading AI compute company in Bristol is seeking Post-Silicon Validation Engineers to develop and validate cutting-edge AI chips. Responsibilities include designing tests and collaborating with various teams for successful product launches. Ideal candidates have strong embedded C/C++ experience and knowledge of ASICs. Competitive salary and benefits, including flexible working and health insurance, are offered.

Qualifications

• Strong experience in Bare metal / embedded C/C++.
• Good knowledge of digital ASICs.
• Experience in post-silicon validation process.

Responsibilities

• Plan, design, develop and debug silicon validation tests in C/C++ on FPGA.
• Deploy silicon validation tests on first silicon.
• Develop automated test framework and regression test suites in Python.

Skills

Bare metal / embedded C/C++

Digital ASIC knowledge

Problem-solving

Excellent communication

Collaboration

Debugging skills

Knowledge of PCIe

Experience with Arm CPUs

Statistical analysis

Tools

Python

FPGA

System IP

AMBA protocols

Job description

About Graphcore

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute.

It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry.

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone.

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation.The Role:

We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation.Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.

The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team.

Responsibilities and Duties

• Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon
• Deploy silicon validation tests on first silicon and debugging them
• Develop automated test framework and regression test suites in Python to optimize validation efficiency
• Collaborate closely with engineers from many other disciplines on a variety of topics
• Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies
• Analyse test results, identify and debug failures/defects
• Contribute to shared test and validation infrastructure
• Provide feedback to architects

Essential skills:

• Strong experience in Bare metal / embedded C/C++
• Good knowledge of digital ASICs
• Be highly motivated, a self starter, and a team player
• Ability to work across teams and programming languages to find root causes of deep and complex issues
• Experience of the post-silicon validation process applied in digital ASIC environments
• Python, Linux
• Excellent communication skills and the ability to collaborate with others to solve problems
• Excellent problem-solving, analytical & diagnostic skills

Desirable skills:

• Driver level experience with one or more of the following is highly desirable:
  • PCIe
  • Ethernet
  • Memory technologies (LPDDR, DDR, HBM, …)
  • Other peripherals such as I2C, I3C, SPI, …
• Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable
• Experience of Arm CPUs, System IP and debug tools
• Experience of AMBA protocols
• Understanding of ML applications and their workloads
• Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support

Benefits:

In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.