Microarchitect & RTL Design Engineer

Baya Systems; England; On-site; GBP 70,000 - 90,000; Full time

Job summary

A leading technology company in the United Kingdom is seeking a seasoned Microarchitect and RTL Design Engineer to contribute to innovative technology solutions. The ideal candidate will design and develop microarchitectures for highly configurable IPs and collaborate closely with software and verification teams. This role requires a strong background in microarchitecture and RTL coding, along with excellent problem-solving and communication skills. Join us to shape our technology portfolio and to make a significant impact in the field.

Qualifications

• 8+ years of hands-on experience in microarchitecture and RTL development.
• Experience designing IP blocks for caches, memory subsystems, and interconnects.
• Commitment to detail, strong problem-solving abilities.

Responsibilities

• Design and develop microarchitectures for configurable IPs.
• Collaborate with software teams for configuration requirements.
• Work with verification teams on assertions and test plans.

Skills

Microarchitecture

RTL coding

Problem-solving skills

Communication skills

Collaboration skills

Education

BS, MS in Electrical Engineering, Computer Engineering or Computer Science

Tools

Verilog

System Verilog

EDA tools

Python

Job description

About the Role: We are seeking a seasoned Microarchitect and RTL Design Engineer with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions.

Responsibilities

• Design and develop microarchitectures for a set of highly configurable IPs
• Microarchitecture and RTL coding ensuring optimal performance, power, area
• Collaborate with software teams to define configuration requirements, verification collaterals etc.
• Work with verification teams on assertions, test plans, debug, coverage etc.

Qualifications

• BS, MS in Electrical Engineering, Computer Engineering or Computer Science
• 8+ years and current hands-on experience in microarchitecture and RTL development
• Proficiency in Verilog, System Verilog
• Familiarity with industry-standard EDA tools and methodologies
• Experience with large high-speed, pipelined, stateful designs, and low power designs
• In-depth understanding of on-chip interconnects and NoCs
• Experience within ARM ACE/CHI or similar coherency protocols
• Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NOCs
• Familiarity with RAS designs, QoS in fabrics, PCIe/IO is a plus
• Experience with modern programming languages like Python is a plus
• Excellent problem-solving skills and attention to detail
• Strong communication and collaboration skills