IC Verification Engineer - Cambridge, On-Site

Raspberry Pi Foundation; United Kingdom; On-site; GBP 65,000 - 90,000; Full time

Benefits offered by this job

Pension 8% contributions

Life assurance 4x base

Income protection 75%

Private medical insurance

EV salary sacrifice access

Job summary

Raspberry Pi Foundation in Cambridge is seeking an IC Verification engineer to join our ASIC team and help deliver next-generation products. You will own IP and chip-level verification planning and execution, and will work closely with the design team to create verification plans and test benches from scratch or using shared components.

The role requires hands-on verification across the silicon flow, from synthesis through silicon sign-off, with strong debugging, SystemVerilog/UVM experience,

Qualifications

• Hands-on experience with at least three projects.
• Experience of creating test benches from scratch, using SystemVerilog, Python, or UVM.
• Experience of writing embedded C, ideally for Cortex M-class MCUs.
• Good technical understanding in at least one complex IP protocol, e.g. PCIe, HDMI, USB, SDIO, AMBA bus architectures.
• Ability to write functional coverage and SVA.
• Good understanding of design/front-end processes.
• Experience with low-power simulations.

Responsibilities

• Take ownership for IP and chip-level verification planning and execution.
• Interact with the design team to compose verification plans and create test benches from scratch or using shared verification components.
• Contribute to verification across the silicon flow and support sign-off.

Skills

SystemVerilog

Python

UVM

Embedded C

Cortex-M MCUs

IP protocols

SVA

Testbench

Tools

Cadence

Jasper

Bash/TCL/Make

Job description

Raspberry Pi Foundation in Cambridge is seeking an IC Verification engineer to join our ASIC team and help deliver next-generation products. You will own IP and chip-level verification planning and execution, and will work closely with the design team to create verification plans and test benches from scratch or using shared components.

The role requires hands-on verification across the silicon flow, from synthesis through silicon sign-off, with strong debugging, SystemVerilog/UVM experience,