Job Search and Career Advice Platform

Enable job alerts via email!

IC Package Design Engineer

Technical Futures Ltd

England

On-site

GBP 70,000 - 90,000

Full time

Today
Be an early applicant

Generate a tailored resume in minutes

Land an interview and earn more. Learn more

Job summary

A leading Semiconductor firm in the United Kingdom is seeking an experienced Senior Package Design Engineer. The successful candidate will focus on package design activities, leveraging tools like Cadence APD/Allegro to deliver high-speed interconnect systems. Ideal candidates will have over 5 years of experience in the semiconductor field, along with a Bachelor's degree in Electronic Engineering. A highly competitive salary package is offered.

Qualifications

  • 5+ years of Semiconductor Package design experience.
  • Expertise with Cadence tools for design simulations.
  • Understanding of IC package thermal and mechanical behavior.

Responsibilities

  • Undertake package design activities with cross-functional teams.
  • Deliver high-speed interconnect systems.
  • Ensure cost-effective methodologies and verify electrical characteristics.

Skills

Semiconductor Package design
Cadence APD/Allegro tools
Ansys SW tools
AutoCAD
IC physical layout
Thermal and mechanical behavior of IC Packages

Education

Bachelors Electronic Engineering Degree
Job description
Overview

A Senior Package Design Engineer with extensive hands‑on experience using Cadence APD/Allegro tools, experience with Ansys/AutoCAD and SI/PI Simulation tools will join a thriving Semiconductor scale‑up enabling the build of scalable, energy‑efficient AI systems worldwide.

Responsibilities

The Senior Package Design Engineer will undertake all package design activities with cross‑functional team collaboration - delivering high‑speed interconnect systems; ensuring cost‑effective methodologies are incorporated, completing verification of electrical characteristics of the package and providing support to assembly‑related activities.

Qualifications
  • 5+ years' Semiconductor Package design using Cadence APD/Allegro tools
  • Expertise with Cadence (Virtuoso/Extract IM/Power DC) / Ansys SW tools
  • Using AutoCAD
  • Experience of IC physical layout
  • Minimum of Bachelors Electronic Engineering Degree
  • A basic understanding of Thermal and mechanical behaviour of IC Packages
Compensation

This exciting Semiconductor Company will offer a highly competitive salary package to the successful Senior Package Design Engineer.

Get your free, confidential resume review.
or drag and drop a PDF, DOC, DOCX, ODT, or PAGES file up to 5MB.