GPU Physical Design Engineer

Apple; Greater London; On-site; GBP 90,000 - 130,000; Full time

Job summary

Apple Inc. in the United Kingdom is seeking a seasoned PD engineer to drive physical design from RTL through tape-out for next-generation GPUs.

You will partner with Front-End teams to align architecture with PD constraints, optimize floorplanning, and deliver high-performance, power-efficient GPU designs. The role emphasizes collaboration across design domains, implementing best practices, and solving complex timing and physical signoff challenges for 1GHz+ GPU architectures.

Qualifications

• BSc/MSEE/MEng/BEng or equivalent is required.
• Proven ability in ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and timing signoff.
• Experience with large GPU designs and frequencies >1GHz is valued.

Responsibilities

• Work closely with the Front-End team to understand chip architecture and drive physical aspects early in design cycle.
• Drive best in class Physical Design construction and optimization recipes for performance, power, and Area (PPA).
• Collaborate to drive methodologies and “best known methods” to streamline PD work, create guidelines and checklists, drive execution and track progress.
• Be focal point for place and route; drive work among place and route engineers, set goals, plan short/long-term work, and understand dependencies between domains like top, STA, block Place & Route.
• Manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution.

Skills

GPU architecture

Cross-team collaboration

Synthesize complex designs

RTL understanding

Education

BSc/MSEE/MEng/BEng or equivalent

Tools

Synthesis tools

DFT insertion tools

Floorplanning tools

Place & Route tools

Timing signoff tools

Power/Clock distribution tools

Job description

Selection changes the language of the page/content

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you will help design and manufacture our next-generation, high-performance, power-efficient Graphics processors (GPUs). You will ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you will be crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on, technical work. You will be responsible for implementing complete chip designs from RTL to tape-out. Join us!

Description

Are you a confident problem solver who thrives under pressure to find new and creative solutions? Are you ready to help chart the future of Apple’s ecosystem? If so, we are excited to hear from you.

Responsibilities

• Work closely with the Front-End team to understand chip architecture and drive physical aspects early in design cycle.
• Drive best in class Physical Design construction and optimization recipes for performance, power, and Area (PPA).
• Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution and track progress.
• Be focal point for place and route drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block Place & Route.
• Manage and resolve design and flow issues related to physical design, identify potential solutions and drive execution.

Minimum Qualifications

• BSc/MSEE/M Eng/BEng or equivalent is required
• We value proven ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place & Route and all aspects of timing, electrical and physical signoff.

Preferred Qualifications

• Work with Front-End teams to understand the design architecture to drive optimal floorplanning and physical implementation through early RTL feedback.
• Use design knowledge and state-of-the-art physical construction and optimization flow to push performance, power, and Area (PPA) of GPU designs.
• Experience with multi-voltage, power gated and power retention will be an advantage.
• Your practical knowledge with hierarchical design approach, top-down design, budgeting, timing and physical convergence will be an asset.
• Showcase your experience on integrating IP from both internal and external vendors and be able to specify and drive IP requirements in the physical domain.
• Your depth of expertise with large GPU designs (>20M gates) with frequencies in excess of 1GHz utilizing state-of-the‑art technologies will serve you well.
• We would like you to join our team if you have a detailed understanding of database management issues.
• From a CAD tool perspective, experience crafting Floor-planning tools, P&R flows, global timing verification and Physical Design Verification Flows is required.
• Familiar with various process-related design issues including Design for Yield and Manufacturability, multi Vt strategies and thermal management.

At Apple, we're not all the same. And that's our greatest strength. We draw on the differences in who we are, what we've experienced and how we think. Because to create products that serve everyone, we believe in including everyone. Therefore, we are committed to treating all applicants fairly and equally. As a registered Disability Confident employer, we will work with applicants to make any reasonable accommodations. Apple will consider for employment all qualified applicants with criminal backgrounds in a manner consistent with applicable law. Learn more

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