Director - Silicon Logical Design

Axelera AI; Bristol; Hybrid; GBP 150,000 - 230,000; Full time

Benefits offered by this job

Attractive compensation package

Pension plan

Employee insurances

Option to get company shares

Job summary

A leading AI technology company seeks a Director of Silicon Logical Design to lead their digital design organization. This hands-on leadership role requires extensive experience in digital design and proven team leadership skills. The ideal candidate will have expertise in RTL development and knowledge of AI accelerator design. Flexible working options are offered, including remote work from various locations. This position offers an attractive compensation package with opportunities for collaboration and innovation.

Qualifications

• Extensive experience in digital/logical design for complex SoCs.
• Proven ability to lead high-performing silicon design teams.
• Strong expertise in RTL and micro-architecture development.
• Experience with large-scale SoC integration, including CPUs, accelerators, memory subsystems, and interconnects.
• Solid understanding of performance, power, and area trade-offs in advanced process nodes.
• Experience working closely with verification and physical design teams to achieve functional and timing closure.
• Strong communication skills and the ability to operate at both strategic and hands-on technical levels.
• Preferred: Experience with AI/ML accelerators, GPUs, NPUs, or high-performance compute architectures.
• Familiarity with industry-standard interconnects (e.g., AXI, NoC architectures)
• Knowledge of low-power design techniques and multi-clock / multi-voltage systems
• Experience with silicon bring-up, post-silicon debug, and root-cause analysis
• Experience working in a startup or fast-scaling environment

Responsibilities

• Lead and grow the silicon logical design team.
• Drive translation of specifications into high-quality RTL.
• Own end-to-end logical design execution for SoCs.
• Partner closely with architecture, verification, physical design, DFT, software, and product teams to ensure robust and scalable designs
• Define and enforce best practices for RTL quality, coding standards, reuse, and design reviews
• Oversee block-level and top-level integration, ensuring performance, power, area, and schedule targets are met
• Support bring-up, debug, and silicon validation activities, including root-cause analysis of silicon issues
• Contribute to long-term technology and roadmap planning, including IP strategy and future architecture directions
• Mentor and develop engineers, fostering a culture of technical excellence, ownership, and collaboration

Skills

Digital design expertise

Team leadership

RTL development

Communication skills

Architecture

SoC integration

Verification collaboration

Power optimization

Multi-clock design

Debugging

Tools

SystemVerilog

Verilog

Job description

About Us

Axelera AI is not your regular deep-tech startup. We are creating the next‑generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

In just four years, we have raised a total of $120 million and have built a world‑class team of 220+ employees (including 49+ PhDs with more than 40 000 citations), both remotely from 18 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands.

We have also launched our Metis™ AI Platform, which achieves a 3–5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million.

Our unwavering commitment to innovation has firmly established us as a global industry pioneer.

Are you up for the challenge?

Position Overview

We are seeking a Director of Silicon Logical Design to lead and scale our digital design organization. In this role, you will be responsible for the architectural realization, RTL implementation, and integration of complex AI accelerator SoCs from specification through tape‑out. You will combine deep technical expertise with strong people leadership to drive execution, quality, and innovation across multiple silicon programs.

This is a hands‑on leadership role for someone who thrives at the intersection of architecture, implementation, and team building in a fast‑paced startup environment.

Key responsibilities

• Lead and grow the silicon logical (digital) design team, including RTL, integration, and design methodology
• Drive the translation of system and micro‑architecture specifications into high‑quality RTL implementations
• Own the end‑to‑end logical design execution for one or more SoCs, from concept through tape‑out
• Partner closely with architecture, verification, physical design, DFT, software, and product teams to ensure robust and scalable designs
• Define and enforce best practices for RTL quality, coding standards, reuse, and design reviews
• Oversee block‑level and top‑level integration, ensuring performance, power, area, and schedule targets are met
• Support bring‑up, debug, and silicon validation activities, including root‑cause analysis of silicon issues
• Contribute to long‑term technology and roadmap planning, including IP strategy and future architecture directions
• Mentor and develop engineers, fostering a culture of technical excellence, ownership, and collaboration

Qualifications

• Extensive experience in digital / logical design for complex SoCs, with multiple successful tape‑outs
• Proven ability to lead and grow high‑performing silicon design teams
• Strong expertise in RTL and micro‑architecture development (SystemVerilog / Verilog)
• Experience with large‑scale SoC integration, including CPUs, accelerators, memory subsystems, and interconnects
• Solid understanding of performance, power, and area trade‑offs in advanced process nodes
• Experience working closely with verification and physical design teams to achieve functional and timing closure
• Strong communication skills and the ability to operate at both strategic and hands‑on technical levels
• Preferred: Experience with AI/ML accelerators, GPUs, NPUs, or high‑performance compute architectures
• Familiarity with industry‑standard interconnects (e.g., AXI, NoC architectures)
• Knowledge of low‑power design techniques and multi‑clock / multi‑voltage systems
• Experience with silicon bring‑up, post‑silicon debug, and root‑cause analysis
• Experience working in a startup or fast‑scaling environment

Location

We offer a flexible working arrangement, with options to:

• Work from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Zurich in Switzerland, Florence and Milan in Italy or Bristol in the United Kingdom) if you're already based in the vicinity.
• Work fully remotely from any European country (incl. the UK) you are already in.
• Relocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven).

What Weoffer

This is your chance to shape and be part of a dynamic, fast‑growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and the option to get company shares.

An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.

At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.