Associate-level FPGA Design Engineer

Nu Quantum; Cambridge; On-site; GBP 65,000 - 95,000; Full time

Benefits offered by this job

Flexible working options

Group DIS cover (4 x salary)

Sabbatical after 4 years

Employee referral scheme

Private medical and dental cover

On-site gym membership

Cycle scheme

Refreshments in office

28 days annual leave + holidays

Holiday purchase option

Family leave policies

Cambridge Botanical Gardens access

Job summary

Nu Quantum is seeking an Associate‑level FPGA Design Engineer to implement and debug real‑time control systems for quantum networking. You will work with software, electronics engineers and AMO physicists to bring up multi‑node quantum networking systems, including ARTIQ Sinara hardware and CERN’s White Rabbit platform.

You will design RTL for Xilinx Zynq/Ultrascale, integrate embedded C/Rust code, and help automate tool flows and CI/CD pipelines.

Qualifications

• Proficient in SystemVerilog, Verilog and/or VHDL with RTL design principles.
• Hands‑on experience with Xilinx or Altera device families.
• Familiarity with SPI, I2C, Ethernet and hardware interfaces.
• Experience with verification testbenches and constrained random verification.
• Knowledge of CDC checks, synthesis and timing closure.
• Experience with Python scripting.
• Strong written and verbal communication skills.

Responsibilities

• Design, develop, and verify RTL code for Xilinx Zynq and Ultrascale devices.
• Design, develop, and verify Embedded code in C/Rust.
• Develop, debug and verify real-time control systems using ARTIQ Sinara hardware.
• Collaborate with senior engineers to develop hardware subsystems.
• Develop debugging tools for in-system visibility of real-time systems.
• Contribute to design documentation, test plans and technical reports.
• Contribute to CI/CD pipelines and automated release flows.
• Collaborate with physicists, optical engineers, hardware and software engineers to define requirements.

Skills

SystemVerilog

Verilog

VHDL

RTL design

Xilinx devices

SPI

I2C

Ethernet

testbenches

Python

Linux

Tools

Cocotb

SVAs

Job description

We are looking for an Associate-level FPGA Design Engineer with experience using Xilinx FPGAs and Zynq/Ultrascale SoCs. In this role, you will work with a multidisciplinary team to implement and debug real-time control systems for quantum networking applications. You will work closely with software and electronics engineers, and AMO physicists to bring-up and deploy multi-node quantum networking systems. As a member of the Control team, you will be responsible for developing and supporting our current hardware platforms, which includes the Artiq control system with the Sinara family of hardware, while also contributing to our next generation platform based on CERN's White Rabbit technology. This is a hands-on role where you will get to contribute to the development of cutting edge quantum networking infrastructure.,

• Design, develop, and verify RTL code in SystemVerilog, Verilog, VHDL and/or Migen for Xilinx Zynq and Ultrascale devices.
• Design, develop, and verify Embedded code in C/Rust.
• Develop, debug and verify real-time control systems using ARTIQ Sinara hardware.
• Collaborate with senior engineers to develop and verify hardware subsystems.
• Contribute to the development of debugging tools to provide in-system debug visibility of real-time systems.
• Contribute to design documentation, test plans and technical reports.
• Contribute to automation of tool flows, CI/CD pipelines and automated release flows.
• Collaborate with physicists, optical engineers, hardware and software engineers to define requirements, capture specifications and design appropriate solutions.
• Curiosity and a proactive approach to learning new concepts, tools, and ways of working.
• Experience working with Linux.

Essential skills and experience

• Proficient in SystemVerilog, Verilog and/or VHDL with a solid understanding of RTL design principles.
• Hands‑on experience with Xilinx or Altera device families.
• Familiarity with communication protocols (SPI, I2C, Ethernet) and hardware interfaces.
• Experience using testbenches for verification, constrained random verification Knowledge of CDC checks, synthesis and timing closure.
• Experience with scripting languages, preferably Python.
• Strong written and verbal communication skills for documentation and reporting.

Desirable Skills (nice to have but not required)

• Experience in low latency and/or real‑time systems.
• Experience debugging Arm or RISC‑V CPU subsystems with GDB, debuggers and trace tools.
• Experience writing embedded C or Rust.
• Verification using Cocotb and/or SystemVerilog, the use of SVAs within verification testbenches and Formal workflows.
• Experience with RF signal generation and processing, including the use of Direct Digital Synthesis (DDS) frequency synthesis techniques, RF communication protocols and modulation techniques.
• Proficiency in working with high‑speed DACs and ADCs for RF and mixed‑signal applications.
• Experience working with Linux.

Join Nu Quantum - Shaping the Future of Technology

Nu Quantum is at the forefront of quantum computing and advanced technology, driven by innovation, diversity, and a commitment to excellence. We're creating an environment where brilliant minds from all backgrounds collaborate to push the boundaries of what's possible.

Founded to commercialise research generated over the last decade at the Cavendish Laboratory, Nu Quantum is on a mission to shape the future of quantum information systems.

We're working on exciting technology that will improve the utility and accelerate the time‑to‑market of quantum computing systems.

We integrate novel quantum photonic technology to form an efficient and scalable quantum networking infrastructure in partnership with world‑leading companies and academic groups.

• Flexible working options
• Group DIS cover (4 x salary)
• 1 month paid Sabbatical after 4 years of service
• Generous Employee Referral Scheme
• Private Medical and Dental Cover (With Vitality and Bupa)
• On-site gym membership
• Cycle scheme
• Refreshments, including fruit and beverages, are available in the office.
• 28 days annual leave, including a 3-day company shutdown period + UK Public Holidays
• Option to purchase up to 5 days holiday per year
• Enhanced paid family leave policies
• Access to the Cambridge Botanical Gardens