FPGA Engineer | HT2025PM1101

Mindverse Consulting Services; Cachan; À distance; Plein temps

Résumé du poste

A technology consulting firm is looking for an experienced microelectronics engineer in Cachan, France. You will lead complex FPGA projects, defining architectures and specifications while collaborating with hardware and software teams. Ideal candidates have 5-10 years of ASIC/FPGA design experience and proficiency in VHDL, Verilog, and SystemC/C++. This role offers competitive benefits, including profit-sharing and meal vouchers, with a focus on remote work.

Prestations

Profit-sharing

Remote work options

Meal vouchers

Corporate mutual

Qualifications

• 5 to 10 years of experience in ASIC/FPGA design, strong exposure to Telecom/Aero/Rail/Space/Energy environments.
• Ability to work in synergy with hardware and software teams.

Responsabilités

• Define the architecture and technical specifications of complete IP or FPGAs.
• Design/adapt test environments based on UVM as needed.
• Implement complex processing blocks with high real-time constraints.
• Integrate protocols such as Ethernet, PCIe, DisplayPort.
• Mentor junior developers and participate in code and design reviews.

Connaissances

VHDL

Verilog

SystemVerilog

SystemC/C++

Complex testbenches

Signal processing algorithms

Technical English

Formation

Engineering degree in electronics or microelectronics

Outils

Cadence Xcelium

Siemens ModelSim

Vivado

Quartus

Synplify

Description du poste

Job Description

Job Summary

We are looking for an experienced microelectronics engineer to take charge of complex FPGA projects. You will be involved in critical developments in close interaction with the electronic board design and / or embedded software development teams. The projects mainly concern SoC architectures with strong requirements in terms of throughput, latency and synchronization.

Responsibilities & Duties

• Define the architecture and technical specifications of complete IP or FPGAs
• Design / adapt test environments, based on UVM as needed
• Implement complex processing blocks with high real-time constraints
• Integrate protocols such as Ethernet, PCIe, DisplayPort, ...
• Provide IP block integration, RTL simulation, logic synthesis, placement / routing, and on-target validation
• Collaborate closely with the HW and SW teams to ensure functional and temporal consistency of the blocks
• Technically mentor junior developers and participate in code and design reviews

Essential Skills

• Engineering degree in electronics or microelectronics
• 5 to 10 years of experience in ASIC / FPGA design, with strong exposure to Telecom / Aero / Rail / Space / Energy environments...
• Proficiency in VHDL, Verilog, SystemVerilog, SystemC / C++
• Experience in developing complex testbenches, ideally in UVM methodology.
• Knowledge of HDMI, DisplayPort, Ethernet, PCIe, 4G / 5G modem, PHY channels, etc.
• Proficiency in Cadence Xcelium, Siemens ModelSim, Vivado, Quartus, Synplify tools.
• Good understanding of signal processing algorithms and their hardware implementation
• Ability to work in synergy with hardware and software teams
• Technical English required

Benefits

• TOIL - 10
• Profit-sharing - Between 500 and 1000 euros per year
• Participation - Between 500 and 1000 euros per year
• Remote
• Corporate mutual
• Meal vouchers
• Others - Teleworking possible

Interview Process

Interviews planned

• 1st Meeting with a Business Manager
• 2nd Meeting to qualify your technical skills with the FPGA business referent
• 3rd Meeting with the BU manager.

Guarantee Period

• 90 Days. A written confirmation is required from the candidate at the time of profile submission.
• We do not sponsor work visa. Applicant must have valid work eligibility to apply for this position.

Requirements

FPGA