Product Security Architect: Threat Modeling & Secure SDLC

BULLIT MANAGEMENT SERVICES LIMITED; Pohjois-Pohjanmaa; On-site; EUR 70,000 - 100,000; Full time

Job summary

BULLIT MANAGEMENT SERVICES LIMITED is seeking a Product Security Architect to review, validate, and refine threat models across applications, Linux platforms, REST APIs, and FPGA-based systems. You will assess build environments and production processes, identifying attack surfaces and trust boundaries to strengthen security across product ecosystems.

Responsibilities include updating security architecture documentation and providing remediation guidance to UI, platform, FPGA, and build/release

Qualifications

• Experience in threat modeling and product security architecture reviews.
• Strong knowledge of secure SDLC principles and secure-by-design practices.
• Experience assessing security across multiple product ecosystems and interfaces.

Responsibilities

• Review, validate, and refine product threat models using industry-standard methodologies (STRIDE, PASTA, Attack Trees).
• Perform comprehensive security assessments across application/UI software, Linux-based platforms, REST APIs, FPGA-integrated systems, and build/release environments.
• Identify attack surfaces and trust boundaries, and propose remediation strategies across standalone and integrated product ecosystems.
• Review and update security architecture documentation to reflect required controls; provide ongoing security guidance to engineering teams.

Skills

Threat modeling

AppSec

Product security architecture

Secure SDLC

Job description

BULLIT MANAGEMENT SERVICES LIMITED is seeking a Product Security Architect to review, validate, and refine threat models across applications, Linux platforms, REST APIs, and FPGA-based systems. You will assess build environments and production processes, identifying attack surfaces and trust boundaries to strengthen security across product ecosystems.

Responsibilities include updating security architecture documentation and providing remediation guidance to UI, platform, FPGA, and build/release