Senior ML Engineer - On-Prem Knowledge Graphs for EDA

Keysight Technologies; Barcelona; Presencial; EUR 70.000 - 100.000; Jornada completa

Descripción de la vacante

Keysight Technologies in Barcelona is seeking a Machine Learning Engineer to design and build low-latency retrieval systems and an EDA-aware knowledge graph. You will contribute to the semantic insight layer, embeddings, and governance for IP-sensitive deployments, collaborating with product and tool teams.

The role emphasizes on-prem inference, RAG architectures, and working with LLMs and vector/graph databases to enable scalable ML for semiconductor workflows.

Formación

• MS or PhD in Computer Science, Electrical Engineering, or related field
• 5+ years building production ML or data-intensive systems
• Experience building RAG and knowledge graph systems in production
• Hands-on expertise with LLMs: embeddings, fine-tuning, prompt and context engineering
• Proficiency in Python and modern ML frameworks (PyTorch, Hugging Face)
• ML applied to semiconductor applications, especially RF & microwave is valued

Responsabilidades

• Design and build low-latency hybrid retrieval over large data for on-prem deployments
• Develop the semantic insight layer: tagging, metadata, embeddings as assets
• Build the EDA-aware knowledge graph with inference, versioning, and queries
• Implement MCP servers exposing retrieval, graph traversal, and lineage with access controls
• Engineer governance to propagate access control from source data to embeddings and graph nodes
• Benchmark retrieval quality, embeddings, and LLMs under cost and latency constraints
• Collaborate with product, EDA tool teams and customers to translate semiconductor workflows

Conocimientos

Python

PyTorch

Hugging Face

LLMs

Embeddings

APIs

On-Prem Inference

Data Governance

API Design

Educación

MS or PhD in CS/EE or related field

Herramientas

Vector databases

Graph databases

MCP (Model Context Protocol)

On-prem inference frameworks

Descripción del empleo

Keysight Technologies in Barcelona is seeking a Machine Learning Engineer to design and build low-latency retrieval systems and an EDA-aware knowledge graph. You will contribute to the semantic insight layer, embeddings, and governance for IP-sensitive deployments, collaborating with product and tool teams.

The role emphasizes on-prem inference, RAG architectures, and working with LLMs and vector/graph databases to enable scalable ML for semiconductor workflows.