Research Engineer - Benchmarking (RE1)

Barcelona Supercomputing Center; Barcelona; Vor Ort; EUR 42.000 - 62.000; Teilzeit

Benefits dieser Stelle

Private health insurance

Relocation support

Zusammenfassung

Barcelona Supercomputing Center (BSC) in Barcelona invites applications for a Research Engineer - Benchmarking (RE1) to develop and optimize performance benchmarks for RISC-V platforms and COTS MPSoCs. The role is anchored in the HPES Laboratory, focusing on performance characterization and benchmarking within HPC contexts.

You will work with the HPES Lab on projects involving performance analysis, porting benchmarks to simulators and FPGA prototypes, and collaborating with UPC master's

Qualifikationen

• Degree in Computer Science, Electronics, Embedded Systems.
• Proven experience with hardware performance counters in COTS MPSoCs.
• Experience with RISC-V (e.g., training scholarship).
• Enrolled in a UPC master program.
• Familiar with performance analysis.
• Experience with C and assembler programming.
• Good communication skills and English proficiency.

Aufgaben

• Generate and optimize benchmarks and kernels for RISC-V platforms and COTS MPSoCs.
• Port and run those benchmarks to simulators, FPGA prototypes and COTS MPSoCs.

Kenntnisse

Communication skills

English (written and spoken)

Proactive attitude

Ausbildung

Degree in Computer Science or Electronics

Tools

C programming

Assembler programming

Jobbeschreibung

Job Reference
475_26_CS_HPES_RE1
Position
Research Engineer - Benchmarking (RE1)

Closing Date
Friday, 06 November, 2026

Reference: 475_26_CS_HPES_RE1

Job title: Research Engineer - Benchmarking (RE1)

About BSC

The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries.

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We are particularly interested for this role in the strengths and lived experiences of women and underrepresented groups to help us avoid perpetuating biases and oversights in science and IT research. In instances of equal merit, the incorporation of the under-represented sex will be favoured.

We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences.

If you consider that you do not meet all the requirements, we encourage you to continue applying for the job offer. We value diversity of experiences and skills, and you could bring unique perspectives to our team.

Context And Mission

The High-Performance Embedded Systems (HPES) Laboratory at the Barcelona Supercomputing Center aims at carrying out research on bringing HPC technologies to systems with some form of criticality, namely safety, mission and security. This includes domains such as automotive, space, avionics, robotics, manufacturing, etc. Our work is mainly done in the context of bilateral projects with several EU companies as well as several European-funded projects. For further details on the HPES Lab, please visit: https://bsc.es/discover-bsc/organisation/scientific-structure/high-performance-embedded-systems

BSC is involved in several projects on the design of innovative RISC-V based CPU processor, accelerators, and MPSos. BSC is also carrying out activities related to the performance analysis of the latest commercial computing solutions in the market. We are looking to hire a candidate to do a master at UPC working on performance characterization and benchmarking for BSC RISC-V designs and COTS MPSoCs.

Key Duties

• Generate and optimize benchmarks and kernels for RISC-V platforms and COTS MPSoCs
• Port and run those benchmarks to simulators, FPGA prototypes and COTS MPSoCs

Requirements

• Education
• Degree on Computer Sciences, Electronics, Embedded Systems, and the like
• Essential Knowledge and Professional Experience
• Proven experience with hardware performance counters of COTS MPSoCs
• Proven experience with RISC-V (e.g., with training scholarship)
• Enrolled in a UPC master program
• Additional Knowledge and Professional Experience
• Familiar with performance analysis
• Experience with C and assembler programming
• Competences
• Problem-solving, pro-active, result-oriented work attitude
• Good communication skills including a good command of the English language (written and spoken)

Conditions

• The position will be located at BSC within the Computer Sciences Department
• We offer a part-time contract (25,2h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, private health insurance, support to the relocation procedures
• Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
• Holidays: 22 days of holidays + 6 personal days + 24th and 31st of December per our collective agreement
• Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
• Starting date: 01/12/2026