Principal Physical Design Engineer

Analog Devices; Madrid; On-site; EUR 120,000 - 180,000; Full time

Job summary

Analog Devices, Inc. in Madrid, Spain is seeking a Principal Physical Design Engineer to own end-to-end RTL-to-GDSII implementation and signoff for complex SoCs.

You will drive timing closure, select Cadence/Synopsys PD flows, and lead a distributed PD team across locations to meet project milestones. The role requires 10+ years of PD experience and a strong background in floorplanning, CTS, routing, DRC/LVS, and power analysis.

Qualifications

• 10+ years of physical design experience with tape-outs on advanced technology nodes.
• B.Tech./M.Tech. or higher in Electrical or Electronics Engineering or equivalent.

Responsibilities

• Own RTL-to-GDSII implementation, including floorplanning, CTS, routing, and STA closure.
• Review timing constraints and provide feedback on timing closure to PD and Design teams.
• Hands-on experience with Cadence and Synopsys PD flows to drive implementation and signoff.
• Lead setup and hold timing closure, IR/EM analysis, congestion resolution, and PPAs.
• Lead signoff activities, including multi-mode multi-corner STA, DRC/LVS, and power analysis.
• Provide leadership for a geographically distributed PD team across locations and manage priorities.
• Identify, evaluate, and mitigate technical risks and communicate trade-offs to stakeholders.

Skills

Physical design

Education

Electrical or Electronics Engineering

Tools

Cadence

Synopsys

Job description

About Analog DevicesAnalog Devices, Inc.Siga leyendo para descubrir lo que necesitará para tener éxito en este puesto, incluyendo habilidades, cualificaciones y experiencia.(NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge.ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers.With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible.Learn more atand on LinkedIn and X.

Principal Physical Design Engineer

Role Overview

The Principal Physical Design Engineer is a senior technical leader responsible for end-to-end physical implementation and signoff of complex SoCs across advanced technology nodes.The role combines hands-on RTL-to-GDSII expertise, design convergence, and team leadership to deliver high-quality silicon in partnership with Design, DFT, Verification, CAD, and signoff teams.

Key Responsibilities

• Own RTL-to-GDSII implementation, including floorplanning, CTS, routing, equivalence checking, ECO implementation, and STA closure.
• Apply a strong working knowledge of SDC timing constraints and timing closure to review implementation results and provide informed feedback to the Physical Design and Design teams.
• Apply hands-on experience with Cadence and or Synopsys based physical design flows to drive implementation, optimisation, flow debugging, and signoff activities.
• Drive setup and hold timing closure, IR/EM analysis, congestion resolution, and physical verification to achieve PPA and quality targets.
• Lead signoff activities, including multi-mode multi-corner STA, DRC/LVS physical verification, and power analysis.
• Provide leadership for a geographically distributed Physical Design team, overseeing planning, execution, and issue resolution while collaborating across locations with design teams and project leads to manage priorities, mitigate risks, and meet key project milestones.
• Drive project risk management by identifying, evaluating, and mitigating technical risks and dependencies, providing critical input from a physical design perspective, and clearly communicating trade-offs, status, and recommendations to stakeholders and leadership.

Qualifications

• B.Tech., M.Tech., or higher qualification in Electrical or Electronics Engineering, or an equivalent discipline.
• 10+ years of physical design experience, with successful tape-outs on advanced technology nodes.
• Hands-on experience with industry-standard physical design and signoff tools.

#LI-CC1

For positions requiring access to technical data, Analog Devices, Inc.may have to obtain exportlicensing approval from the U.S.Department of Commerce- Bureau of Industry and Security and/or the U.S.Department of State- Directorate of Defense Trade Controls.As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C.1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. xiphtebWe foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysSummaryLocation: Ireland, Limerick; Spain, Valencia, CortesValencianasType: Full time

Principal Physical Design Engineer Madrid, Kingdom Of Spain, ES