IC CAD Layout Technician

Qorvo, Inc.; Barcelona; Presencial; EUR 32.000 - 42.000; Jornada completa

Descripción de la vacante

Qorvo, Inc. in Barcelona, Spain is seeking an IC CAD Layout Technician to create and maintain IC layout data and GDSII databases for manufacturing release.

You will work with Design, Process, and Software Engineers to develop designs from concept through tapeout and collaborate to ensure compliance with design guides and foundry requirements. The role is onsite in Barcelona and requires an associate degree in electronics with 1+ year of semiconductor experience, plus proficiency with

Formación

• Associate degree in Electronics or equivalent relevant experience.
• 1+ year of experience in the semiconductor industry.
• Ability to manage timelines and deliverables.
• Strong attention to detail and data accuracy.
• Proficiency with Microsoft Office.

Responsabilidades

• Collaborate with Design, Process, and Software Engineers across concept to tapeout.
• Create and maintain IC layout databases using industry-standard EDA tools.
• Create, maintain, and validate GDSII layout databases for manufacturing release.
• Generate and manage GDSII deliverables for tapeout and manufacturing.
• Perform DRC and verification activities to ensure manufacturability.
• Create and update fabrication, mask, and product documentation.
• Incorporate changes into layout databases with configuration control.
• Review BOMs and deliverables for accurate manufacturing release.
• Investigate and resolve data integrity issues during verification or release.
• Support tapeout activities and data package release.
• Coordinate with Design and Process Engineering to reflect device requirements.

Conocimientos

Attention to detail

Time management

Documentation

Efficient work

Educación

Associate degree in Electronics

Herramientas

ADS

Altium

Cadence

AWR

AutoCAD

Descripción del empleo

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IC CAD Layout Technician

Experience Level: Support

Job Type: Regular

Location: Barcelona, ES, 8034

Requisition ID: 10754

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visitwww.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

In this role you will create and maintain IC CAD design data using industry-standard tools, ensuring compliance with design guides, layout rules, and internal procedures. You will work closely with Design, Process, and Software Engineers to develop, verify, and release semiconductor products for manufacturing. Your responsibilities will include IC layout database development, GDSII generation, verification, documentation, and tapeout support.

This is an onsite role based in our Barcelona, Spain office.

Responsibilities:

• Collaborate with Design, Process, and Software Engineers to develop designs from concept through schematic, layout, verification, and manufacturing release.
• Create and maintain IC layout databases using industry-standard EDA tools.
• Create, maintain, and validate tiled GDSII layout databases for manufacturing release, ensuring compliance with foundry requirements and internal design standards.
• Generate and manage GDSII deliverables, including hierarchical and tiled layouts used for tapeout and manufacturing.
• Perform design-rule checks (DRC) and verification activities to ensure manufacturability and adherence to design requirements.
• Create and update fabrication, mask, and product documentation using tools such as ADS, AWR, Cadence, and AutoCAD.
• Incorporate design, process, and manufacturing changes into layout databases while maintaining configuration control and documentation accuracy.
• Review drawings, GDSII deliverables, and bills of materials (BOMs) to ensure accurate and complete manufacturing release packages.
• Investigate and resolve layout, documentation, and data integrity issues identified during verification, release, or manufacturing review.
• Support tapeout activities, including preparation, validation, and release of manufacturing data packages.
• Coordinate with Design and Process Engineering teams to ensure layout data accurately reflects device requirements and process capabilities.

Required Qualifications:

• Associate degree in Electronics or equivalent relevant experience.
• 1+ year of experience in the semiconductor industry.
• Ability to manage timelines and expectations, work efficiently, and produce high-quality deliverables.
• Strong attention to detail and commitment to data and documentation accuracy.
• Proficiency with Microsoft Office.

Preferred Qualifications

• 1+ year of CAD design experience.
• Proficiency with ECAD/EDA tools such as ADS, Altium, Cadence, AWR, and AutoCAD.
• Experience working with GDSII databases, hierarchical layouts, tiled GDS generation, and tapeout processes.
• Familiarity with semiconductor manufacturing flows and layout verification methodologies.
• Strong written and verbal communication skills.

This position is only open to candidates having a qualified legal status to work in Spain.

MAKE A DIFFERENCE AT QORVO

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.