FPGA Architect (PL) - Relocation to Spain

Oesía Group; Rivas-Vaciamadrid; On-site; EUR 90,000 - 140,000; Full time

Benefits offered by this job

Career development

Flexible compensation

Training platforms

Diversity & CSR

Team-oriented environment

Job summary

Oesía Group in Madrid is seeking a Chief FPGA & SoC Architect (PL) to join a major aerospace/defense project. You will lead FPGA/SoC design and verification teams, ensuring RTL quality and DO-254/MIL-STD compliance.

Relocation to Spain is supported. The role requires driving technical decisions, mentoring engineers, and collaborating with international clients. A strong background in high‑reliability digital design is essential.

Qualifications

• Degree in Telecommunications, Electronics, Industrial, Aerospace Engineering, or similar.
• Master’s degree or specialization in high‑reliability digital design is highly valued.
• ≥10 years in FPGA/SoC design and verification within high‑criticality sectors.
• ≥3 years leading teams or acting as technical authority in projects.
• Experience in aerospace/defense environments (DAL A/B/C or equivalent).
• Proficiency in: Verification: UVM, test environments, coverage; tools like Vivado, ModelSim/Questa, Libero SoC.

Responsibilities

• Provide support and validation for FPGA/SoC architectures in aerospace/defense components and systems.
• Act as technical authority for key design decisions, trade-offs, and reviews.
• Ensure compliance with Aerospace/Defense Standards and regulatory frameworks (DO‑254, MIL‑STD‑461, EN9100 / ISO 9001, RTCA/EASA).
• Lead FPGA engineering, digital verification, HW/SW integration, and validation teams.
• Transfer technical expertise, mentor engineers, establish internal design and verification standards.
• Ensure best practices in RTL design, documentation, and configuration management.

Skills

FPGA architecture

Team leadership

Regulatory compliance

RTL design experience

VHDL/Verilog/SystemVerilog

Education

Engineering degree (telecoms/electronics/industrial/aerospace)

Master’s degree in high-reliability digital design

Tools

Vivado

ModelSim/Questa

Libero SoC

Job description

FPGA Architect (PL) - Relocation to Spain

¡At Oesia Group, we are growing! We would like to count on you for our next job offer:
We are looking fora Chief FPGA & SoC Architect (PL) to join an important Project located in Madrid

What are we looking for?

• An/a FPGA Architect (PL) - Relocation to Spain, with at least 7years of experience.
• Availability to join a stable project in Madrid

Requirements:

• Degree in Telecommunications, Electronics, Industrial, Aerospace Engineering, or similar.
• Highly valued: Master’s degree or specialization in high‑reliability digital design is highly valued.
• ≥10 years in FPGA/SoC design and verification within high‑criticality sectors
• ≥3 years leading teams or acting as technical authority in projects.
• Proven experience in the design of systems or components from leading manufacturers in aerospace and defense environments (DAL A/B/C or equivalent requirements).
• Proficiency in:Verification: UVM, test environments, coverage methodologies and tools likeVivado, ModelSim/Questa, Libero SoC.

What will your responsibilities be?

• Provide support and validation for functional and structural FPGA/SoC architectures within aerospace and defense components and systems.
• Act as technical authority, responsible for key design decisions, trade-offs, and critical reviews throughout the product design and development lifecycle.
• Compliance with Aerospace/Defense Standards and Regulatory Frameworks such asDO‑254,DO‑160,MIL‑STD‑461 (EMI/EMC),MIL‑STD‑810,ECSS‑Q‑ST‑60‑02,EN9100 / ISO 9001,RTCA/EASA.
• Lead FPGA engineering, digital verification, HW/SW integration, and validation teams.
  Ensure adherence to best practices in RTL.
• Transfer technical expertise, mentor engineers, and establish internal design and verification standards.
• Ensure adherence to best practices in RTL design, documentation, and configuration management.
• Simulation models, testbenches, and UVM environments andHigh‑integrity RTL code (VHDL/Verilog/SystemVerilog).
• Validate V&V plans, requirement matrices, and coverage metrics.
• Participate in bids, effort estimations, and definition of technical strategies.
• Lead standardization initiatives and continuous improvement in design and verification processes.

What we offer you?

• Work in a multinational company recognized as one of the best companies to work for in 2025, according to Actualidad Económica and Forbes.
• Stable and innovative technological projects for leading national and international clients.
• Career plan: we offer an attractive professional career based on experience and personal potential within a continuously evolving company with solid growth.
• Free access to various training platforms, providing you with a wide multidisciplinary catalog.
• Flexible compensation.
• An equal, diverse company with great Corporate Social Responsibility.
• A positive, healthy, and cooperative work environment. Teamwork is the cornerstone of the company's project successes.

Have you heard of us?

With over 3.800 professionals in 20 corporate offices across Spain, Brussels, Latin America, and Asia, it generates quality employment and helps people grow in technical careers.