DSP Engineer (Digital Signal Processing)

Alén Space

Nigrán

Presencial

EUR 50.000 - 70.000

Jornada completa

14 días+
Generador de candidaturas

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Ventajas ofrecidas por este puesto de trabajo

Competitive compensation with ongoing reviews
Wellbeing program: health, dental, and accident insurance
Flexible start/finish times
Personalized career development and training support

Descripción de la vacante

Alén Space in Nigrán, Spain is expanding its team and seeking a talented DSP Engineer to join their multidisciplinary team of software, FPGA, and digital signal processing engineers.

The ideal candidate will have a Bachelor’s or Master’s in Telecommunications Engineering and over 3 years of experience in designing digital communication systems, particularly with expertise in FPGA implementations and algorithm development.

Offering flexible work arrangements, competitive compensation, and a commitment to inclusion and diversity, Alén Space proudly supports professional growth and wellbeing.

Formación

  • Over 3 years of experience in developing signal processing algorithms for communication systems.
  • Experience in migrating modeled algorithms to implementations in FPGAs or SDR frameworks.
  • Understanding of RF concepts such as AGC, noise figure, power amplifiers, phase noise.

Responsabilidades

  • Design digital communication systems using SDRs and FPGAs.
  • Functional modeling of DSP algorithms in Verilog/VHDL or C/C++.
  • Support the evolution of custom space-tailored radio platforms.

Conocimientos

Verilog / SystemVerilog
Yosys / Xilinx Vivado
Python
C/C++
Gnuradio

Educación

Bachelor or Master’s degree in Telecommunications Engineering

Descripción del empleo

Overview

We´re expanding our team at Alén Space, and are looking for a DSP Engineer; with passion in what you do, talented and experienced. You will be part of a multidisciplinary team of software, FPGA, and digital signal processing engineers and will support the implementation of DSP (Digital Signal Processing) algorithms in programmable devices (FPGAs).

Responsibilities
  • Design digital communication systems using platforms including software defined radios (SDRs) and FPGAs.
  • Functional modeling of DSP algorithms and their implementation in RTL (Verilog/VHDL) or high‑level languages (C/C++).
  • Support the evolution of our custom space‑tailored radio platforms.
Technical Skills
  • Verilog / SystemVerilog
  • Yosys / Xilinx Vivado
  • Python
  • C/C++
  • Gnuradio
Existing Applications
  • DVB‑S2 transmitter in Verilog.
  • ADS‑B receiver in Verilog.
  • AIS receiver, hybrid between FPGA (VHF channelizer) and CPU (GNURadio/C++).
  • Proprietary M2M modem implemented in C.
Qualifications
  • Bachelor or Master’s degree in Telecommunications Engineering.
  • More than 3 years of experience in developing signal processing algorithms for communication systems in Python, C/C++ or Matlab using both floating point and fixed‑point design techniques.
  • Experience in migrating modeled algorithms to implementations in FPGAs or SDR frameworks.
  • Understanding of RF concepts such as AGC, noise figure, power amplifiers, phase noise, PLL, oscillators/mixers.
Valuable Knowledge
  • Expertise with Software‑Defined Radios (SDR) frameworks such as GNU Radio.
  • Experience with Xilinx Zynq or Xilinx Zynq UltraScale+ series FPGAs, Analog Devices AD9361, and other common RF chipsets.
  • Some experience with Python or other scripting languages.
  • Knowledge of coding theory and techniques: LDPC, Turbo codes.
Benefits
  • Work remotely a percentage of the time as defined with the manager.
  • Flexible start/finish times; reduced intensive working hours on Fridays and in summer Monday to Friday.
  • Competitive compensation with ongoing reviews, flexible compensation.
  • Wellbeing program: Health, dental, and accident insurance; free fruit and free lunch every Friday and much more.
  • Personalized career plan development, training, and language learning support.
  • Very committed to inclusion and diversity; we promote equal opportunities in recruitment.
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