Design Verification Engineer

European Tech Recruit; Lausanne; Vor Ort; CHF 90’000 - 120’000; Vollzeit

Zusammenfassung

A leading semiconductor company in Lausanne is seeking a digital design engineer. The role involves leading verification activities, mentoring team members, and managing project timelines while developing robust verification methodologies. The ideal candidate has over 7 years of experience in semiconductor design verification, expertise in metrics-driven verification, and familiarity with protocols such as PCIe and USB. This is a full-time position offering an opportunity to work within a dynamic and innovative environment.

Qualifikationen

• 7+ years’ experience in semiconductor design verification with a proven record.
• Experience with metrics-driven verification and testbench development.
• Familiarity with protocols such as PCIe, USB, or DisplayPort.

Aufgaben

• Lead verification activities across assigned projects.
• Create verification plans from design specifications.
• Manage project timelines and monitor team progress.

Kenntnisse

Strong communication skills

Proficiency in scripting and regression management

Expertise in metrics-driven verification

Experience in leading teams

Jobbeschreibung

A leading semiconductor company based in Lausanne, Switzerland is seeking a digital design engineer.

Key Responsibilities

• Lead verification activities across assigned projects, providing direction and ensuring alignment with design goals.
• Offer technical leadership and mentorship to team members to strengthen overall verification capability.
• Create comprehensive verification plans derived from detailed design specifications.
• Manage project timelines by planning work, allocating tasks, and monitoring progress across the team.
• Develop and maintain robust verification methodologies, environments, and standard debug flows while collaborating closely with design teams.

Requirements

• Strong communication skills and the ability to work effectively in a multi-site, team-oriented environment.
• Proficiency in scripting, regression setup, and management, with a solid understanding of simulation, debugging, and verification flows (including gate-level simulation).
• Expertise in metrics-driven verification, testbench development (UVM or similar), and use of third-party VIP; exposure to emulation or FPGA prototyping is a plus.
• Minimum of 7 years’ experience in semiconductor design verification, with a proven record validating complex, high-volume designs and balancing schedule vs. quality trade-offs.
• Experience leading teams and coordinating external resources, with familiarity in constrained-random testing, SerDes, and protocols such as PCIe, USB, or DisplayPort.

If this role is of interest please apply directly on LinkedIn or send a copy of your CV to [e-mail].

By applying to this role you understand that we may collect your personal data and store and process it on our systems. For more information please see our Privacy Notice (https://eu-recruit.com/about-us/privacy-notice/)

Seniority level

• Mid-Senior level

Employment type

• Full-time

Job function

• Information Technology

Industries

• Software Development