Senior SoC RTL Design Architect - NoC & Fabric for AI

Tenstorrent; Toronto; Hybrid; CAD 100,000 - 500,000; Full time

Job summary

A leading tech firm is looking for a Sr. Staff SoC RTL Design Engineer specializing in fabric, to lead architecture and implementation of high-performance on-chip interconnects. The ideal candidate has deep expertise in NoC microarchitectures and RTL development. This hybrid role offers competitive compensation ranging from $100k to $500k, and welcomes candidates at various experience levels to contribute to cutting-edge AI technologies.

Benefits

Highly competitive compensation package

Benefits package

Mentorship opportunities

Qualifications

• Deep expertise in on-chip fabric and NoC microarchitectures for SoCs.
• Proficient in RTL development for complex interconnects across full ASIC flows.
• Expert in performance tuning for low-latency, high-bandwidth AI workloads.

Responsibilities

• Lead architecture and RTL implementation of custom fabric IP and NoC routers.
• Drive performance-aware design decisions for compute-heavy interconnects.
• Contribute to validation using emulation or FPGA prototyping.
• Support timing closure and power optimization for backend teams.
• Mentor junior engineers on fabric best practices.

Skills

RTL development (SystemVerilog/Verilog)

On-chip fabric expertise

NoC microarchitectures

PPA optimization

Collaboration and mentorship

Education

Bachelor's or higher in Electrical Engineering or related field

Tools

FPGA prototyping

UVM

Job description

A leading tech firm is looking for a Sr. Staff SoC RTL Design Engineer specializing in fabric, to lead architecture and implementation of high-performance on-chip interconnects. The ideal candidate has deep expertise in NoC microarchitectures and RTL development. This hybrid role offers competitive compensation ranging from $100k to $500k, and welcomes candidates at various experience levels to contribute to cutting-edge AI technologies.