Senior High-Speed Hardware Architect

Fidus; Ottawa; On-site; CAD 95,000 - 145,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Matching GRSP contributions

Annual profit-sharing bonus

Flexible benefits package

Job summary

Fidus in Ottawa is seeking a Hardware Designer to architect and deliver complex high‑speed electronic systems. You will collaborate with FPGA, software, and SI/PI teams to define architectures, design high‑speed circuits, and support product development from concept through bring‑up and validation.

The role emphasizes production‑ready designs, mentoring junior designers, and tackling DDR, PCIe, SerDes and multi‑layer PCB challenges.

Qualifications

• 5+ years of direct electronics design experience.
• Bachelor's degree in Electrical or Computer Engineering.
• Ability to lead a design technically and as a mentor.
• Experience with high-speed devices and protocols (DDR4, PCIe Gen4, MIPI, Gigabit Ethernet, USB-C, HDMI, SerDes, JESD204B).

Responsibilities

• Develop the system and board level architectural design with software/FPGA collaboration.
• Provide schematic design and component selection for high-speed circuits and memory buses.
• Conduct simulations (LTSpice) and bench verification.
• Collaborate with SI team for critical nets analysis.
• Lead design reviews to meet Fidus quality standards.
• Generate test plans and support lab bring-up and verification.

Skills

High-speed design

FPGA

Mentoring

Signal integrity

Guidance across HW lifecycle

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Cadence CIS/OrCAD/Cadence Allegro

Job description

Fidus in Ottawa is seeking a Hardware Designer to architect and deliver complex high‑speed electronic systems. You will collaborate with FPGA, software, and SI/PI teams to define architectures, design high‑speed circuits, and support product development from concept through bring‑up and validation.

The role emphasizes production‑ready designs, mentoring junior designers, and tackling DDR, PCIe, SerDes and multi‑layer PCB challenges.