Senior ASIC Design Verification Engineer, Compute DSP/AI Processors

Qualcomm; Markham; On-site; CAD 124,000 - 175,000; Full time

Job summary

A leading technology firm is seeking ASIC Design Verification Engineers to innovate Qualcomm Snapdragon processors. The role involves verification of complex IP blocks and collaboration with design teams to tackle engineering challenges. Ideal candidates will have a Bachelor's degree in Engineering, strong analytical skills, and experience in ASIC verification. The position offers competitive compensation, ranging from $124,200 to $174,200, plus bonuses and benefits. Opportunities for new grads and senior engineers are available.

Benefits

Competitive annual discretionary bonus

Annual RSU grants

Comprehensive benefits package

Qualifications

• Strong understanding of digital logic.
• Understanding of object oriented programming concepts.
• Some design or DV experience, whether in work, co‑op, or coursework.

Responsibilities

• Verification of a complex IP block using UVM methodology.
• Resolving architecture, design, or verification problems.
• Collaborating closely with the Design team to test and debug.

Skills

Strong problem solving and analytical thinking skills

Excellent communication skills

Self‑motivated, goal oriented, team player

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Python

CShell

Job description

Company

Qualcomm Canada ULC

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Do you ever wonder when connected devices become احتمال devices? Be part of the group that is working on technology that will bring “Cognition” to all connected devices: That means devices that don’t just react to their surroundings, they interact with the world.

We are a compact, tightly knit ASIC IP team of architects, design, and verification engineers. We create HW IP in the heart of the Snapdragon DSP Neural Processing Unit (NPU) that works in coordination with the other NPU components to accelerate AI machine learning, video and other dsp applications. We’re continuously evolving and improving our design and verification architectures to tackle complex engineering problems. To achieve the high standards of Qualcomm products, our team members contribute with a variety of skills and participate in many aspects of the design, verification, and final product evaluation processes.

We are looking for a few good ASIC Design Verification Engineers to be part of our team to innovate and design leading edge Qualcomm Snapdragon DSP processors that will empower AI and video processing applications and products. We are open to all levels of applicants; the role (Jr, Sr., Staff) and responsibility will be commensurate with experience. New Position

Responsibilities

• Verification of a complex IP block using UVM methodology
• Resolving architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
• Collaborating closely with the Design team to test, debug and close coverage on the design
• Modifying testbench components such as scoreboard, agents, sequences, to verify new features
• Writing tests in SystemVerilog
• Writing functional coverage and assertions using SystemVerilog
• Regression maintenance and triaging of test failures
• Contributing to testbench architecture and optimization
• Contributing to testplan implementation and verification methodology
• Supporting integration testing of the design
• Performance testing

Qualifications

• Strong problem solving and analytical thinking skills
• Excellent communication skills
• Self‑motivated, goal oriented, team player

New Grad

• Bachelors - Engineering, Computer Engineering
• Understanding of digital logic
• Understanding of objected oriented programming concepts
• some design or DV experience, whether in work, co‑op, or coursework

Senior or above

• 2+ years of direct experience in ASIC verification
• Experience with verification methodology (UVM, assertions, coverage‑driven constrained‑random verification)
• Experience with scripting languages (Python, CShell)

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

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Pay range and Other Compensation & Benefits

$124,200.00 - $174,200.00 Law

The above pay scale Attachment refers to the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, Please here's note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success meget at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer.

If you would like more information about this role, please contact Qualcomm Careers.