Principal CPU Microarchitect - RISC-V & AI Compute

Tenstorrent

Toronto

On-site

CAD 103,320 - 151,536

Full time

14 days+

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Benefits offered by this job

Highly competitive compensation

Benefits package

Equal opportunity employer

Job summary

A leading AI technology company is seeking a Risc-V Architect to influence CPU architecture pivotal to their platform. The role involves designing high-performance RISC-V cores and collaborating with cross-functional teams. Candidates should have over 10 years in CPU modeling, proficiency in C++/Python, and a strong grasp of RISC-V technologies. This hybrid role is based in Toronto and offers a competitive compensation package.

Qualifications

10+ years in CPU performance modeling and microarchitecture.
Proficient in C++ and Python.
Strong understanding of RISC-V instruction-set.
Familiar with compiler design and software-to-hardware impact.

Responsibilities

Analyze AI workloads to identify CPU performance requirements.
Architect custom RISC-V CPU cores optimized for performance.
Design custom instructions for improved performance.

Skills

CPU performance modeling

Microarchitecture

C++

Python

RISC-V instruction-set

Compiler design

Open-source RISC-V cores

LLVM toolchains

Job description

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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors. As we push performance boundaries, we’re reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience. This is a rare opportunity to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent.

This role is hybrid, based out of Toronto, ON or Austin, TX.

We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

An experienced architect with over 10 years in CPU performance modeling and microarchitecture.
Proficient in C++ and Python, with a strong understanding of RISC-V instruction-set.
Well versed in compiler design and how software stacks impact CPU performance and programmability.
Familiar with open-source RISC-V cores and LLVM toolchains, including adding custom optimization passes.

What We Need

Analyze AI workloads to identify CPU performance requirements and bottlenecks.
Architect custom RISC-V CPU cores optimized for performance, power, and area.
Design custom instructions that improve performance without sacrificing programmability.
Collaborate across compilers, software, and hardware teams to co-design Tenstorrent’s next-gen compute architecture.

What You Will Learn

How modern AI models stress CPU architecture and influence design decisions.
The interplay between compiler design, CPU microarchitecture, and real-world performance.
How Tenstorrent’s unified hardware-software stack enables breakthrough performance for general-purpose AI compute.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

Seniority level