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A leading technology firm in Toronto is seeking a PDK Enablement Engineering Specialist to support the analog design and custom layout team. This role involves maintaining foundry data and collaborating with circuit experts using Cadence tools. Ideal candidates should have a BSEE or MSEE, experience in PDK enablement, and excellent communication skills. The position offers competitive compensation and various benefits.
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PDK Enablement Engineering Specialist
Job Description Summary: As a PDK enablement engineering specialist, you will provide and support the tools and foundry files to enable the circuit implementation teams who build circuits used in cars, cell phones, data centers, etc. using the latest fabrication technologies: finfet, gate all-around, and using the latest Cadence software tools, including AI.
Cadence Design Systems is seeking PDK enablement engineering specialists to enable foundry PDKs and support the growing analog design and custom layout team building IP using the Cadence design tools (Virtuoso, Pegasus, Quantus, etc.) to build high speed interfaces used in chips found in cars, cell phones, data centers, etc.
You will get the opportunity to collaborate with circuit implementation experts to contribute to the development of exciting chips, work with the best-in-class EDA tools and interact with the Cadence engineering team using developing those tools to improve those tools.
The PDKs installed cover the latest technologies offered from all leading edge foundries in gate all-around and finfet nodes, as well as 2D and 2.5D packaging as well as 3D IC stacking.
PDK enablement task
The PDK enablement team is a part of the Cadence Design IP development group responsible for downloading, formatting, installing, QA and testing, releasing, and maintaining foundry data. We analyze initial PDKs and following versions to understand the impact of the design PDK, models, DRC, LVS and extraction rules and decks, reliability requirements on design and share this knowledge with the design teams. Examples of foundry data include physical verification decks, device models, extraction tech files, and Virtuoso PDKs. Those are the fundamental building blocks on which all the design teams rely to build their circuits. We also create and use existing automation and regression routines to ease the installation and ensure the operation of collateral with various tool versions. The quality, accuracy and reliability of the PDK is critical to the efficiency and quality of the circuit design. We customize the foundry collateral to improve the design team efficiency and the design quality. The team interacts with the foundries about the PDK and foundry data, discussing novelties, issues, bugs, etc. The team also interacts with Cadence R&D teams on tool development, based on PDK learnings.
Profil recherché :
The annual salary range for British Columbia is 89,600 CAD to 166,400 CAD. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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