Memory Sub-System Validation Engineer - Data Center GPU

Advanced Micro Devices; Markham; Hybrid; CAD 90,000 - 120,000; Full time

Job summary

A leading company in computing technology is seeking a Memory Validation Engineer in Markham, Canada. This role focuses on pre- and post-silicon validation of high-bandwidth memory systems, collaborating with cross-functional teams. Ideal candidates should have strong programming skills, experience in SOX validation and DRAM vendor collaboration. A Bachelor’s or Master’s degree in Electrical or Computer Engineering is required. The position offers competitive benefits and aims to foster innovation and growth.

Benefits

Competitive benefits package

Opportunity for career development

Qualifications

• Proven ability to drive resolution of critical problems.
• Experience working with major DRAM memory vendors.
• Ability to apply knowledge of high-speed memory technologies.

Responsibilities

• Develop and execute test plans for HBM Functional and Electrical Validation.
• Collaborate with multi-functional teams on memory related issues.
• Lead pre-and post-silicon validation efforts.

Skills

Debug skills to root cause post‑production issues

Strong programming skills (C/C++, Python)

Hands-on experience with JTAG and I2C

Experience in developing test cases for Machine Learning

Education

Bachelors or Masters in Electrical or Computer Engineering

Tools

LAB tools

High-Speed IO Interface

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

THE ROLE:

The Datacenter Graphics and Accelerated Computing Validation Team is looking for a dynamic and energetic person to join our growing post-silicon validation team. The High‑Bandwidth Memory (HBM) sub‑system is a niche technology, that delivers industry leading Datacenter solutions for Machine Learning (ML), and High‑Performance Computing (HPC). Memory Validation engineer is responsible for driving and delivering pre‑ and post‑silicon validation and characterization of on‑die HBM or off‑die DDR Memory on AMD’s Datacenter GPU (Machine Instinct product). In this wide‑ranging role, the validation engineer is the critical interface between various teams: DRAM architecture & product engineering, Memory Controller Design and Software, DDR PHY, to ensure that advanced memory technologies are delivered from architecture to mass production to AMD’s quality and industry standards. The validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON:

An experienced self‑starter with the ability to execute complex test plans independently and collaborate with cross‑function teams to debug and resolve issues. As a valued team member, you are expected to lead by example, and mentor junior engineers. You should be hands‑on with lab tools and comfortable working in a lab environment.

KEY RESPONSIBILITIES:

Memory Sub‑system Validation Engineer’s responsibility includes all aspects of pre‑ and post‑silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought‑after candidate possesses extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture, Unified Memory controller, PHY design and high‑speed IO interface, DRAM device, and associated calibration/training mechanisms.

Key Qualifications:

• Ability to apply knowledge of other high‑speed, high‑performance memory technologies
• Experience working with major DRAM memory vendors and validation of DRAM device is a plus
• Debug skills to root cause post‑production issues, customer returns
• Proven ability to drive resolution of critical problems, able to comfortably work in lab environment

PREFERRED EXPERIENCE:

• Significant experience in SoC validation, verification and debug of High‑Bandwidth Memory sub‑system
• Develop functional, electrical validation plans for memory features, align cross‑functional teams on the support and validation plans
• Drive debug in post silicon, root‑cause problems and steer the team to the best corrective action to move forward
• Collaborate and drive memory related silicon issues across multi‑functional teams: Design, Verification, Silicon Validation, Productization, System Hardware and Software
• Hands‑on experience in using industry standard JTAG, I2C, Tester and Lab tools
• Strong programming skills (C/C++, Python) and comfortable working on Linux or Windows platforms
• Experience in developing test cases for Machine Learning, High Performance Computing
• Able to work as a team and work efficiently in a dynamic environment and on multiple projects

ACADEMIC CREDENTIALS:

• Bachelors or Masters in Electrical or Computer Engineering

LOCATION:

Markham, Canada

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.