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Senior Mask Layout Designer

Qualcomm

Markham

On-site

CAD 80,000 - 100,000

Full time

Today
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Job summary

A leading semiconductor company located in York Region, Markham, seeks a layout designer to develop block, macro, or chip level layouts. The role includes conducting analyses and collaborating with stakeholders. Candidates must have a Bachelor's degree in Electrical Engineering or related field and relevant design experience. The position offers a competitive salary range of $38.52 - $57.78 per hour and a comprehensive benefits package.

Benefits

Competitive annual discretionary bonus
Annual RSU grants
Comprehensive benefits package

Qualifications

  • Bachelor's degree in a related field and 2+ years of experience in layout design.
  • 2+ years of experience using layout design tools like Cadence.
  • High School diploma with 6+ years of layout design experience.

Responsibilities

  • Develop layouts and floorplans according to project specifications.
  • Conduct analyses and tests to verify designs.
  • Collaborate with internal and external stakeholders on projects.

Skills

Layout design and verification tools
Analysis and troubleshooting
Project requirements interpretation

Education

Bachelor's degree in Electrical Engineering or related field
Master's degree in Technology or related field

Tools

Cadence
LVS
Job description
Company:

Qualcomm Canada ULC

Job Area:

Engineering Services Group, Engineering Services Group > Mask Layout Design

General Summary:

Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Minimum Qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 2+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
  • Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
  • High School diploma or equivalent and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
  • 2+ years of experience using layout design and verification tools (e.g., Cadence, LVS, rmap).
Preferred Qualifications:
  • Master's degree in Technology, Electrical Engineering, Electronic Engineering, or related field.
  • 4+ years of experience designing custom layouts in a specific relevant technology (e.g., FINFET, CMOS, GATE ARRAY).
  • 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design).
  • 1+ year in a technical leadership role with or without direct reports.
  • 1+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).
Principal Duties and Responsibilities:
  • Reads and interprets moderately complex project requirements, specifications, and schematics to understand block-level to macro-level design needs.
  • Independently builds block level to macro level layouts and floorplans based on understanding of layout techniques, design elements, and electronic principles (e.g., currents, resistance, parasitic).
  • Adheres to established guidelines, processes, design rule manuals, and checklists to ensure designs are high-quality, accurate, and meet standards.
  • Tests and validates block level or macro level designs against specifications using layout and verification tools (e.g., Cadence, LVS, rmap) to identify and resolve errors.
  • Gathers information and conducts analyses and sign-off to identify where an issue has occurred; troubleshoots and debugs moderately complex technical issues.
  • Identifies and recommends ways to improve or automate processes and practices in order to increase efficiency of one's work.
  • Maintains up-to-date awareness of industry trends and developments related to mask layout tools and techniques; applies best practices to create and improve builds.
  • Adapts to significant changes and setbacks in order to manage pressure and meet deadlines.
  • Manages individual project priorities, deadlines, and deliverables; helps team members do the same.
  • Collaborates with engineers, team members, and other stakeholders to align on needs, share status updates, and troubleshoot issues.
Level of Responsibility:
  • Works under some supervision.
  • Provides some supervision/guidance to other members; does not have direct reports.
  • Decisions are moderate in nature. Errors are detected and corrected with relatively minor financial impact or effect on projects, operations, or customer relationships. May require involvement beyond immediate work group to correct.
  • Requires verbal and written communication skills to convey information that may be somewhat complex to others who may have limited knowledge of the subject in question. Role may require basic negotiation and influence, cooperation, tact, and diplomacy, etc.
  • Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
  • Most tasks require multiple steps which can be performed in various orders; some planning and prioritization must occur to complete the tasks effectively; mistakes may result in some rework.
  • Creativity is needed to draft original documents, imagery, or work products within established guidelines.
  • Deductive and inductive problem solving is required; multiple approaches may be taken/necessary to solve the problem; often information is missing or incomplete; intermediate data analysis/interpretation skills may be required.
  • Incumbent's input may be solicited during strategic planning period.
Responsibilities Excluded:
  • Does not have financial accountability.
Equal Opportunity Statement:

Qualcomm is an equal opportunity employer. If you are an individual with a disability, please contact disability-accommodations@qualcomm.com or call the company toll-free number for accommodations.

Pay Range and Other Compensation & Benefits:

$38.52 - $57.78

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is one component of total compensation at Qualcomm. Competitive annual discretionary bonus program and opportunity for annual RSU grants are offered. Benefits package supports work, home, and play.

Contact:

If you would like more information about this role, please contact Qualcomm Careers.

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