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Layout Design Co-op (Winter 2026)

Ciena

Ottawa

On-site

CAD 100,000 - 125,000

Full time

2 days ago
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Job summary

A leading technology company in Ottawa seeks an Analog Layout Design Co-op to work on advanced high-speed analog design circuits. Collaborating with a skilled team, you will create layout designs and conduct rigorous verification checks. Ideal candidates have a background in Electrical Engineering and experience with CMOS technologies. Competitive hourly rate ranges from $25.00 to $34.00, along with access to an Employee Assistance Program and paid leaves.

Benefits

Employee Assistance Program (EAP)
Paid sick leave
Vacation pay

Qualifications

  • Experience in custom analog and mixed signal layout design.
  • Knowledge of layout techniques like floor planning, device matching, and minimizing parasitics.
  • Experience with semiconductor manufacturing processes and foundry technologies.

Responsibilities

  • Carry out layout feasibility studies on circuit designs.
  • Create layouts of assigned analog blocks following established steps.
  • Conduct verification checks for layout quality.

Skills

Custom analog layout design
Deep sub-micron CMOS knowledge
Scripting skills in PERL or SKILL
Communication and interpersonal skills
Analytical and problem-solving skills
Attention to detail

Education

Studying in Electrical Engineering or related field

Tools

Cadence Virtuoso
Siemens Calibre
Job description

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

The Opportunity

The Wavelogic family of products are widely used in Ciena's optical fiber transmission solutions and are one of the main contributors to Ciena's success in the telecommunications industry.

Successful candidates will be joining a vibrant team with a proven track‑record of success over 30‑years of evolution and revolution in the advancement of high‑speed circuits used in broadband fiber‑optic modems. This team pioneered the introduction of the world’s first high‑speed DAC and ADC analog macros that ushered in the era of coherent fiber‑optic product solutions.

To further strengthen our team, we are looking for a hardworking analog layout design co‑op who will be working on advanced high‑speed analog design circuits in the latest deep‑submicron CMOS and/or BiCMOS technologies.

Your role as an analog layout design co‑op will involve creating layout designs of analog circuits such as high‑speed ADC/DAC and PLL. You will work under the oversight of a principal layout engineer and collaborate closely with the team members.

Responsibilities
  • Carry out layout feasibility studies on various circuit designs in collaboration with senior analog designers. The goal will be to find the best possible solution considering various trade‑offs and discussions with team members.
  • Create layouts of assigned analog blocks by adhering to the steps of floor planning, placement and routing.
  • Conduct thorough verification checks such as DRC, LVS, EM, IR to ensure the final layout possesses the highest level of quality.
  • Investigate new features within the layout tools and processes used for creating layouts with the aim of enhancing productivity.
  • Provide regular status updates, participate in team meetings and share experiences with the rest of the group.
The Must Haves
  • Studying in Electrical Engineering or related field.
  • Experience in custom analog and mixed signal layout design with a strong knowledge of deep sub‑micron CMOS devices.
  • Knowing layout techniques for Floor Planning, device matching, minimizing parasitics, shielding, EM, IR drop.
  • Experience in custom layout design of Analog/Mixed Signal designs (e.g., Opamp, Current Mirror)
  • Familiarity with semiconductor manufacturing processes and foundry technologies.
  • Experience in using industry‑standard layout tools (e.g., Cadence Virtuoso, Siemens Calibre).
  • Knowing how to interpret DRC and LVS reports.
  • Scripting skills in PERL or SKILL are a plus, but not required.
  • Highly motivated with strong team player skills, exhibits a positive can‑do attitude and ability to seamlessly integrate into an existing team culture.
  • Strong communication and interpersonal skills to collaborate with cross‑functional teams.
  • Strong analytical and problem‑solving skills to identify and address layout‑related issues efficiently.
  • Meticulous attention to details, ensuring the highest level of accuracy and quality in all layout designs.
  • Ability to thrive in a fast‑paced, dynamic work environment and adapt quickly to changing project requirements.
  • Ability to identify failure‑prone circuit and layout structures and proactively work with circuit designers to resolve problems.
Pay Range

The hourly rate for this position is $25.00 - $34.00

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

In addition to competitive compensation, Ciena offers students access to the Employee Assistance Program (EAP), company‑paid holidays, paid sick leave, and vacation pay as required by applicable laws.

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At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is anEqual Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

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