Design Verification Engineer

Actalent; Ottawa; On-site; CAD 118,000 - 152,000; Full time

Job summary

Actalent in Ottawa, ON seeks a Design Verification Engineer to architect, implement and verify Ethernet IP for next‑gen SoCs used in automotive, industrial and edge computing markets. You will develop UVM environments, analyze performance, and collaborate with IP teams to ensure timely, high‑quality IP delivery.

The role is fully onsite in Ottawa, offering a challenging environment with emphasis on documentation, coverage, and continuous DV methodology improvements.

Qualifications

• 5–15 years of IP/SoC experience.
• Proficiency in SystemVerilog and UVM verification.
• Strong IP/SoC development methodology knowledge.
• Experience with EDA tools and scripting (Python, TCL, Perl).
• Experience architecting DV infrastructure and full verification.

Responsibilities

• Architect, design, implement, and verify Ethernet/networking IP for next-gen SoCs.
• Develop UVM-based verification environments, create tests, debug failures.
• Analyze performance and complexity trade-offs.
• Collaborate with IP architecture, design, and verification teams.
• Produce documentation for IP specs and verification results.
• Review coverage metrics; adjust tests to meet targets.
• Drive continuous improvement in design and verification methodologies.

Skills

SystemVerilog

UVM Verification

IP & SoC development

Python scripting

TCL

Perl

Makefile

Shell scripting

EDA Tools

Education

Bachelor's degree in CS/Engineering

Tools

SystemVerilog simulators

UVM testbenches

Job description

Job Description

We are seeking a Design Verification Engineer to join an experienced R&D organization focused on developing networking switch and network controller IP cores that support advanced Time Sensitive Networking (TSN) standards. This team develops foundational networking IP integrated into next-generation microcontrollers, processors, and switches used across automotive, industrial, edge computing, and communications applications. The engineer will architect, design, implement, and verify Ethernet and networking IP for integration into System-on-Chip (SoC) platforms, ensuring high-quality IP delivery through collaboration with architecture, design, and verification teams.

Job Title: Design Verification Engineer

Responsibilities

• Architect, design, implement, and verify Ethernet/networking IP to be integrated into next-generation SoCs for automotive, industrial, and edge computing markets.
• Develop UVM-based verification environments, create directed and random tests, and debug failures to determine root causes.
• Analyze performance and complexity trade-offs.
• Collaborate with IP architecture, design, and verification teams to ensure timely and high-quality IP delivery.
• Produce documentation for all phases of the project, including IP functional and implementation specifications.
• Review functional and code coverage metrics; modify or add tests to meet coverage requirements.
• Drive continuous improvement in design and verification methodologies.

Essential Skills

• 5-15 years of experience in IP & System on Chip (SoC) products.
• Proficiency in System Verilog and UVM Verification.
• Strong understanding of IP & SoC development methodology and verification tools.
• Experience with EDA tools and scripting (Python, TCL, Perl, Makefile, Shell).
• Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.
• Bachelor's degree in Computer Science, Engineering, or a related field.
• Strong problem-solving, communication, documentation, and teamwork skills.

Additional Skills & Qualifications

• Familiarity with formal verification methodologies.
• Knowledge of functional safety verification.
• Understanding of TCP/IP networking technologies.
• Experience with routers, bridges, and switches.
• Exposure to security and cryptography in hardware or verification.
• Experience in algorithm development and implementation.
• System-level understanding for hardware/software trade-off analysis.

Work Environment

The role is part of the AI and Chip Engineering (ACE) organization, a central engineering team supporting multiple semiconductor business lines. Engineers work closely with architecture, design, and verification teams throughout the development lifecycle of networking and SoC products. The environment emphasizes innovation, collaboration, technical excellence, documentation quality, and continuous methodology improvement. Engineers benefit from working on large-scale semiconductor programs spanning Automotive, Internet of Things (IoT), Networking, and RF business areas, creating strong opportunities for technical growth and long-term career development.

Job Type & Location

This is a Permanent position based out of Ottawa, ON.

Pay And Benefits

The pay range for this position is $110000.00 - $152000.00/yr.

Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.

Workplace Type

This is a fully onsite position in Ottawa,ON.

À propos d'Actalent

Actalent est un leader mondial dans les services dingénierie et de sciences ainsi que dans les solutions de talents. Nous aidons des entreprises visionnaires à faire progresser leurs initiatives dingénierie et de science grâce à laccès à des experts spécialisés qui favorisent léchelle, linnovation et la rapidité de mise sur le marché. Avec un réseau de près de 20 000 consultants et 5 000 clients à travers les États-Unis, le Canada, lAsie et lEurope, Actalent dessert de nombreuses entreprises du Fortune 500. Nous sommes fiers dêtre lune des 500 meilleures firmes de conception de lEngineering News-Record (ENR) pour nos services de conception en ingénierie et un lauréat du prix ClearlyRated Best of Staffing® tant pour le service client que pour les talents.

Actalent est un employeur souscrivant au principe de légalité des chances et accepte toutes les candidatures sans tenir compte de la race, du sexe, de lâge, de la couleur, de la religion, des origines nationales, du statut dancien combattant, dun handicap, de lorientation sexuelle, de lidentité sexuelle, des renseignements génétiques ou de toute autre caractéristique protégée par la loi.

Si vous souhaitez faire une demande daccommodement raisonnable, tel que la modification ou lajustement du processus de demande demploi ou dentrevue à cause dun handicap, veuillez envoyer un courriel à [e-mail] pour connaître dautres options daccommodement.

Ordonnance sur légalité des chances de San Francisco:

Conformément à lOrdonnance sur légalité des chances de San Francisco, pour tous les postes situés dans la ville et le comté de San Francisco, nous examinerons les candidatures des personnes qualifiées ayant un casier judiciaire ou des antécédents criminels.

Utilisation de l'intelligence artificielle (IA):

Nous pouvons utiliser lintelligence artificielle (IA) pour soutenir certaines étapes de notre processus dembauche, notamment la recherche, la présélection et l'évaluation des candidatures. LIA aide à analyser les candidatures et les qualifications, mais les décisions finales sont prises par notre équipe de recrutement. En soumettant votre candidature, vous reconnaissez et acceptez que celle-ci puisse être examinée à laide doutils dAI.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email [e-mail] for other accommodation options.

San Francisco Fair Chance Ordinance:

Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Use of Artificial Intelligence (AI):

We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.