ASIC Design Engineer, Power Analysis/Optimization

Qualcomm; Markham; On-site; CAD 80,000 - 110,000; Full time

Job summary

A leading technology firm in Markham is seeking an ASIC Design Engineer to focus on power optimization for audio applications. The role requires 2-5 years of experience in ASIC design, proficiency in Verilog/VHDL, and the ability to work legally in Canada. Join the team to push the boundaries of low power AI subsystems and contribute to groundbreaking innovations.

Qualifications

• 2-5 years of ASIC hardware design and/or implementation experience.
• Ability to write clean, readable, synthesizable RTL.
• Experience in power analysis and modeling.

Responsibilities

• Review existing power test case definitions.
• Track active and leakage power.
• Review post-silicon power results.

Skills

ASIC hardware design experience

Verilog/VHDL

Understanding of ASIC/VLSI concepts

Logic synthesis experience

Ability to work legally in Canada

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Synopsis and/or Cadence tools

Python

PERL

TCL

Job description

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary

What we are doing has not been done. Shape the future of low power AI subsystems. Push the boundaries on features and performance. Qualcomm Technologies Audio products are designed to offer premium wireless connectivity, high levels of integration, immersive sound quality, and on-device AI for smart audio and context aware applications. An ultra-low power subsystem within a low power SoC; a chip-within-a-chip HW block incorporating multiple always-on IPs, design execution within this group requires solving ground-breaking challenges and multiple power domain crossing issues.

As we are pioneer new and/or improved functionality, innovate to minimize power consumption. Make a difference, join a team on the cutting edge and become an integral part of Qualcomm’s growth and momentum.

Position Overview

We are looking for an ASIC Design Engineer who will focus on power optimization to our team as we innovate and design complex leading, ultra-low power solutions for audio and context aware applications.

The candidate will be responsible for all aspects of tracking power and finding opportunities for improvement. Activities would include:

Responsibilities

• Reviewing existing power test case definitions and defining new ones
• Reviewing waveforms for correctness from a power perspective
• Reviewing PTPX results for both DC and PD netlists
• Reviewing post-silicon power results and correlating with pre-silicon
• Power projection activities, what/if scenario exploration
• Tracking active and leakage power

The role would also call for other design activities from time to time but power would be the primary focus.

Qualifications

• 2-5 years of ASIC hardware design and/or implementation experience.
• Verilog/VHDL RTL design languages and ability to write clean, readable, synthesizable RTL.
• Understanding of ASIC/VLSI concepts
• Experience in logic synthesis using Synopsis and/or Cadence tools.
• Ability to work legally in Canada

Preferred Qualifications

• 5 years of ASIC hardware design related experience
• Experience with power analysis, power modeling and low power RTL design.
• Experience with clock domain crossing techniques
• Power and performance experience with an audio IP core, DSP, various audio interfaces (I2S, PCM, SLIMbus, SoundWire, Audio Codec) and accelerators (low-power AI/ML inference).
• Experience with a subset of DC, FC, PTPX, Power Compiler, Primetime, Modeltech, VCS, power theatre, etc.
• Experience with design rule check (Spyglass, etc.), Formal verification (Formality, LEC, etc.) and/or Power analysis and simulation
• Scripting skills (Python, PERL, TCL or C)
• Knowledge of bus interface protocols (APB, AHB, AXI)
• Experience with post-silicon debug
• Experience with UVM

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Applicants

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may contact Qualcomm regarding reasonable accommodations for individuals with disabilities during the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies.