Head of Silicon Logical Design for AI Accelerators

Axelera AI; Belgique; Sur place; EUR 210 000 - 320 000; Plein temps

Avantages offerts par ce poste

Pension plan

Insurance package

Equity options

Résumé du poste

Axelera AI seeks a Director of Silicon Logical Design to lead and scale the digital design organization. You will oversee architectural realization, RTL implementation, and integration of AI accelerator SoCs from spec through tape-out.

This hands-on leadership role blends architecture, implementation, and team building in a fast-paced startup environment, with mentorship of engineers and a focus on quality and innovation.

Qualifications

• Extensive experience in digital / logical design for complex SoCs, with multiple successful tape-outs.
• Proven ability to lead and grow high-performing silicon design teams.
• Strong expertise in RTL and micro-architecture development (SystemVerilog / Verilog).
• Experience with large-scale SoC integration, including CPUs, accelerators, memory subsystems, and interconnects.
• Solid understanding of performance, power, and area trade-offs in advanced process nodes.
• Experience working closely with verification and physical design teams to achieve functional and timing closure.
• Strong communication skills and the ability to operate at both strategic and hands-on technical levels.
• Experience with AI/ML accelerators, GPUs, NPUs, or high-performance compute architectures.
• Familiarity with industry-standard interconnects (e.g., AXI, NoC architectures).
• Knowledge of low-power design techniques and multi-clock / multi-voltage systems.
• Experience with silicon bring-up, post-silicon debug, and root-cause analysis.
• Experience working in a startup or fast-scaling environment.

Responsabilités

• Lead and grow the silicon logical (digital) design team, including RTL, integration, and design methodology.
• Drive the translation of system and micro-architecture specifications into high-quality RTL implementations.
• Own the end-to-end logical design execution for one or more SoCs, from concept through tape-out.
• Partner closely with architecture, verification, physical design, DFT, software, and product teams to ensure robust and scalable designs.
• Define and enforce best practices for RTL quality, coding standards, reuse, and design reviews.
• Oversee block-level and top-level integration, ensuring performance, power, area, and schedule targets are met.
• Support bring-up, debug, and silicon validation activities, including root-cause analysis of silicon issues.
• Contribute to long-term technology and roadmap planning, including IP strategy and future architecture directions.
• Mentor and develop engineers, fostering a culture of technical excellence, ownership, and collaboration

Connaissances

RTL design

SystemVerilog/Verilog

Digital/logic design leadership

SoC architecture

Tape-out experience

Leadership & mentoring

Cross-functional collaboration

Verification coordination

Power/Performance/Area trade-offs

Interconnects (AXI/NoC)

Description du poste

Axelera AI seeks a Director of Silicon Logical Design to lead and scale the digital design organization. You will oversee architectural realization, RTL implementation, and integration of AI accelerator SoCs from spec through tape-out.

This hands-on leadership role blends architecture, implementation, and team building in a fast-paced startup environment, with mentorship of engineers and a focus on quality and innovation.