Silicon Power Architect, Reality Labs

Meta; Redmond; On-site; AUD 208,000 - 297,000; Full time

Job summary

Meta Reality Labs is seeking a Silicon Power Architect to lead next-generation wearables silicon with emphasis on low-power design, power estimation, and convergence tool flows. The role collaborates across SOC, PMIC, and systems teams to optimize power for AR/VR compute workloads.

The candidate will model use-case power, influence SOC power requirements, and guide prototype development through to high-volume consumer products, leveraging experience shipping silicon and interdisciplinary

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• Bachelor's degree in Computer Engineering or electrical engineering or a relevant technical field, or equivalent practical experience
• 6+ years of experience with production silicon including at least one product shipped
• Experience with methods for partitioning a solution across hardware and software, digital, and other multi-disciplinary boundaries in a system solution
• Experience in technology node scaling and projections
• Experience in custom IP block power estimates
• Experience of low power design principles across RTL, design and system level
• Experience in evaluating architectural trade-offs of performance, power, and area
• Experience employing scientific methods to debug, diagnose, and drive the resolution of cross-disciplinary system issues

Responsibilities

• Model and own use-case power for custom silicon by working closely with the systems team
• Influence the overall SOC IP's power requirements, including power states, high-level power tree, and power sequence requirements
• Work closely with architects of SOCs that optimize functions such as image compute and CPU/GPU workloads for our AR/VR products
• Work closely with PMIC and systems teams on the overall SOC power requirements
• Optimize the power architecture implementation to meet use case power goals
• Work across disciplines, brainstorm big ideas, build new methodologies, prioritize and coordinate multiple initiatives based on impact and deadlines, drive a concept into a prototype and ultimately guide the transition into a high-volume consumer product
• Understand the tradeoffs between general-purpose and custom compute mechanisms, be able to model data flows, and create detailed cost/benefit analysis
• Work on post silicon model to hardware correlation

Skills

Power estimation

Low power design

RTL design

Architectural trade-offs

Data flow modeling

Cost/benefit analysis

Cross-disciplinary collaboration

Debugging complex systems

Power states and power tree

Education

Bachelor's degree in Computer Science / Computer Engineering / relevant field

Bachelor's degree in Computer Engineering / Electrical Engineering / relevant field

MSEE or PhD equivalent

Tools

Synopsys Platform Architect

Virtual prototyping tools

Job description

Summary:

Reality Labs focuses on delivering Meta's vision through creating advanced AI-enabled wearables. The compute performance and power efficiency requirements of wearables require custom silicon. Reality Labs Silicon team is driving the driving the industry forward with innovative work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors. Our chips will enable wearable devices where our real and virtual worlds will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. We are seeking a Silicon Power Architect to lead the development of next-generation silicon solutions for wearables. This role requires experience in low-power design techniques, power estimation, and convergence tool flows and management.

Required Skills:

Silicon Power Architect, Reality Labs Responsibilities:

1. Model and own use-case power for custom silicon by working closely with the systems team

2. Influence the overall SOC IP's power requirements, including power states, high-level power tree, and power sequence requirements

3. Work closely with architects of SOCs that optimize functions such as image compute and CPU/GPU workloads for our AR/VR products

4. Work closely with PMIC and systems teams on the overall SOC power requirements

5. Optimize the power architecture implementation to meet use case power goals

6. Work across disciplines, brainstorm big ideas, build new methodologies, prioritize and coordinate multiple initiatives based on impact and deadlines, drive a concept into a prototype and ultimately guide the transition into a high-volume consumer product

7. Understand the tradeoffs between general-purpose and custom compute mechanisms, be able to model data flows, and create detailed cost/benefit analysis

8. Work on post silicon model to hardware correlation

Minimum Qualifications:

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

2. Bachelor's degree in Computer Engineering or electrical engineering or a relevant technical field, or equivalent practical experience

3. 6+ years of experience with production silicon including at least one product shipped

4. Experience with methods for partitioning a solution across hardware and software, digital, and other multi-disciplinary boundaries in a system solution

5. Experience in technology node scaling and projections

6. Experience in custom IP block power estimates

7. Experience of low power design principles across RTL, design and system level

8. Experience in evaluating architectural trade-offs of performance, power, and area

9. Experience employing scientific methods to debug, diagnose, and drive the resolution of cross-disciplinary system issues

Preferred Qualifications:

Preferred Qualifications:

1. Experience collaborating and/or leading in a team environment

2. Familiarity with high-level modeling tools like Synopsys Platform Architect or virtual prototyping tools is a plus

3. Experience independently driving technical workstreams while coordinating deliverables across hardware, software, and systems teams

4. Experience in using AI agents for managing power tools and extracting results

5. Experience defining and scoping technical specifications for novel silicon architectures in consumer electronics where requirements are continuously evolving

6. MSEE or PhD equivalent

7. Experience in top down high-level-model to HW power modeling of system use cases

8. Experience programming in C, C++, or Python

9. Results-oriented, self-motivated, proactive with demonstrated creative and critical thinking skills

Public Compensation:

$146,000/year to $209,000/year + bonus + equity + benefits

Equal Opportunity:

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