Senior Analog/Mixed-Signal IC Architect

Infineon Technologies; Australia; On-site; AUD 180,000 - 280,000; Full time

Job summary

Infineon Technologies is seeking a Senior Staff Analog/Mixed-Signal Engineer to drive high-performance IC designs in our R&D team. You will lead architecture choices, silicon bring-up, and cross-disciplinary collaboration with analog, layout, and digital design groups.

The role emphasizes transistor-level mastery, Cadence EDA proficiency, and strong modeling skills using MATLAB or Python. Fluency in English is required, with Spanish as an advantage.

Qualifications

• PhD, Master’s, or Diploma in Electrical Engineering or Microelectronics with emphasis on analog/mixed-signal IC design.
• 7+ years of experience in analog and mixed-signal IC design.
• Experience with blocks such as ADCs, DACs and AFEs; AFE+ADC subsystems are a plus.
• Strong transistor-level understanding for design decisions.
• Cadence EDA tools and circuit simulation; MATLAB or Python is a plus.

Responsibilities

• Lead development of high-performance analog and mixed-signal architectures and circuits meeting block- and IC-level specs.
• Own key technical decisions from architecture through silicon bring-up with cross-functional teams.
• Model, design, and simulate analog circuits with collaboration across teams.
• Prepare design reviews and maintain clear design and simulation documentation.
• Support lab and test engineers during measurements and post-silicon validation.

Skills

Analog/mixed-signal design

Transistor-level design

Team collaboration

English fluency

Spanish advantage

Education

PhD, Master’s or Diploma in Electrical Engineering or Microelectronics

Tools

Cadence EDA

Circuit simulation

MATLAB

Python

Job description

Infineon Technologies is seeking a Senior Staff Analog/Mixed-Signal Engineer to drive high-performance IC designs in our R&D team. You will lead architecture choices, silicon bring-up, and cross-disciplinary collaboration with analog, layout, and digital design groups.

The role emphasizes transistor-level mastery, Cadence EDA proficiency, and strong modeling skills using MATLAB or Python. Fluency in English is required, with Spanish as an advantage.