Remote AI Hardware Engineer & Content Specialist

Alignerr Corp.

Wollongong City Council

Remote

AUD 55,000 - 124,000

Part time

7 hours ago
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Benefits offered by this job

Fully remote
Flexible schedule
Freelance perks

Job summary

Alignerr Corp. is seeking a Computer Engineering Expert—AI Content Specialist to help train and improve AI systems remotely on an hourly contract. You will collaborate with leading AI labs to create challenging hardware-focused scenarios, robust references, and evaluation content.

The role emphasizes RISC‑V/ARM, FPGA, memory management, and HW‑SW co-design, plus writing ground-truth solutions in assembly and HDL, and auditing AI outputs in C/C++, Verilog, and VHDL.

Qualifications

  • Master's or PhD in Computer Engineering, Computer Science (hardware focus), or related field.
  • Strong knowledge in Computer Architecture, Embedded Systems, Digital Logic Design, or Operating Systems.
  • Clear written communication of complex hardware and software concepts.
  • High attention to detail and ability to work at bit-level timing and documentation.

Responsibilities

  • Design advanced problems spanning RISC‑V/ARM architecture, FPGA development, memory management, and hardware‑software co-design.
  • Author ground‑truth solutions with assembly code, HDL snippets, and architectural diagrams for AI training.
  • Audit AI outputs in C/C++, Verilog, VHDL for accuracy, efficiency, and standards compliance.
  • Provide structured feedback to improve model reasoning and identify timing issues.

Skills

Computer Architecture
Embedded Systems
Digital Logic Design
Operating Systems

Education

Master's / PhD in Computer Engineering / CS (hardware focus)

Tools

MATLAB
ANSYS
Simulation environments

Job description

Alignerr Corp. is seeking a Computer Engineering Expert—AI Content Specialist to help train and improve AI systems remotely on an hourly contract. You will collaborate with leading AI labs to create challenging hardware-focused scenarios, robust references, and evaluation content.

The role emphasizes RISC‑V/ARM, FPGA, memory management, and HW‑SW co-design, plus writing ground-truth solutions in assembly and HDL, and auditing AI outputs in C/C++, Verilog, and VHDL.

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